A 12‐bit 10‐MS/s SAR ADC with a binary‐window DAC switching scheme in 180‐nm CMOS - Chung - 2018 - International Journal of Circuit Theory and Applications - Wiley Online Library
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Figure 1 from A novel noise efficient feedback DAC within a switched capacitor /spl Sigma//spl Delta/ ADC | Semantic Scholar
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An energy-efficient switching scheme with low common-mode voltage variation and no-capacitor-splitting DAC for SAR ADC | Analog Integrated Circuits and Signal Processing
Design of binary weighted DAC for asynchronous ADC with improved slew rate and with calibrated size of capacitors - Extrica
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adc - Capacitor DAC - Charge Redistribution - Electrical Engineering Stack Exchange
Switched capacitor - Wikipedia
Design of Continuous-Time ΔΣ Modulators with Dual Switched-Capacitor Return-to-Zero DACs - IIT Madras
Electronics | Free Full-Text | Mismatch-Shaping Switching Scheme for Split-Array Capacitive DACs
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A Switched Capacitor-Based SAR ADC Employing a Passive Reference Charge Sharing and Charge Accumulation Technique | Circuits, Systems, and Signal Processing
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![PDF] A switched-capacitor DAC with analog mismatch correction | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/26c69236dafc0f1fc8b42dd8fa33281bff9b46bb/1-Figure1-1.png "PDF] A switched-capacitor DAC with analog mismatch correction | Semantic Scholar")
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A New Structure of 8-Bit 60 MS/s SAR-ADC Using a Reduced Switching Capacitor -DAC Array
Switched-capacitor-adc under Analog to Digital Circuits -13123- : Next.gr
Electronics | Free Full-Text | Mismatch-Shaping Switching Scheme for Split-Array Capacitive DACs
